BITCOS Layout Reduces Ternary LLM Memory Footprint via Zero-Aware Packing
September 16, 2026
BITCOS achieves lower storage costs than the standard 1.58-bit ternary baseline by exploiting high sparsity. By using a presence bitmap and sign vector, the method reduces effective bit-width to 2-z bits per weight, accounting for zero distributions reaching up to 51.5% in 29 tested models.
HOW THIS AFFECTS YOU
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builderYou can achieve higher model density and reduced memory bandwidth requirements on deployment hardware.
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researcherThis demonstrates that symbol equiprobability assumptions in ternary quantization are suboptimal for practical LLMs.